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What can the global semicon industry do to get back its money-making touch!
It is very well known that the global semiconductor industry has had a year full of turmoil. The ongoing global financial has been not been of any help either.
The key question: Has the semiconductor industry really lost its money making touch?
According to iSuppli, facing dwindling profits, fewer opportunities to expand by taking market share from competitors and a shrinking roster of star performers, the semiconductor industry has entered a period of lowered expectations and diminishing options, forcing chip suppliers to rethink their basic strategies for success.
Thanks to Jon Cassell at iSuppli, I caught up with Derek Lidow, president and CEO, of iSuppli, to find out more about why the global semiconductor industry has become less forgiving. He has offered a range of suggestions for the global semiconductor industry to adopt and follow. The beauty of the advice lies in its simplicity, and I hope the industry is reading!
Facing dwindling profits and fewer opportunities to expand by taking market share from competitors and a shrinking roster of star performer, how difficult is the market today?
According to Derek Lidow, at the moment, the makers of electronics have started slamming on the brakes as they have decided that the financial turmoil will effect Christmas spending.
In this scenario, what strategies should the players: a) fabs; b) NAND; c) DRAM; d) materials devise, to ensure some turnaround?
Lidow says that the fab players should consolidate fabs to make them more efficient.
Both the NAND players and DRAM players should push out capacity expansion plans. Makers of devices should make variations of the existing products that customer would like to have, and don’t turn down opportunities to lock in orders for specials.
If semiconductors have actually lost their money-making touch, it is really an alarming sign. However, Lidow advises that the semiconductor business is maturing and every industry, as it matures, must undergo transitions.
Leaders can’t ignore looming changes
“Often, these transitions come as a surprise and many companies go through hard times,” he says. “Semiconductor companies don’t have to go through the turmoil of the steel or automotive industries if it doesn’t want to. The leaders of the industry just can’t ignore the looming changes.”
Is there a way that semiconductor companies break out of the current market dynamics to outperform the industry?
Lidow suggests the semiconductor companies should STOP doing things that they are not good at! He adds: “Each company will have to follow a recipe that eliminates where they are mediocre and focuses on where they add real value. Next, they should change their business models so that semiconductor technology is the tool, not the objective.”
According to him, designing more total systems with system-level chips built around proprietary Intellectual Property (IP) should be enough.
He says: “The electronics industry is $1.5 trillion dollars in size, and the semiconductor industry is $270 billion in size. There is a lot more value to capture. However, the value is more complex to unlock and requires as much or more software expertise as it does semiconductor expertise. They have to get married together to succeed in developing proprietary IP.”
Areas to outspend rivals
As for the areas where companies can massively outspending rivals in areas of products and manufacturing, these would be leading edge wafer foundries, memory chips, and the most complex system-on-chips (SoCs).
Why won’t this massive outspend simply to maintain technical and scale dominances in competitive market segments be risky?
Lidow says you can only use this strategy if you know you can outspend your rival! “We see the problems of a spending race in the memory market where many companies are trying to keep up with Samsung’s massive investments and it is hurting everyone,” he points out.
iSuppli has also advised adopting a scalable acquisition process that would allow a semiconductor company to grow by buying other companies or selected parts of companies.
Lidow says: “I think the point of my article was that there haven’t been any success stories to date. So, this strategy is unproven, but very tantalizing, considering the state of the maturing industry.”
Durga Puja in Bangalore — places to visit
To all of my Bengali and non-Bengali friends, here’s a valuable piece of information provided by Somnath Ray, a key member of the Jayamahal Durga Puja Committee, Bangalore.
Many thanks, Somnathda for providing this information. He has also provided a great map, which is visible here. It clearly highlights the key Durga Pujas that are held in Bangalore.
Durga Pujas in Bangalore
1. JAYAMAHAL SARBAJANIN DURGA CHARITABLE SAMITI
Jayamahal is close to Bangalore Cantt. Rly Station/Mekhri Circle/TV Tower. The Puja is next to the scenic Jayamahal Park.
Jayamahal Durga Puja can be reached through:
Mekhri Circle
(Preferable if you are coming from/through Airport/Hebbal/Yesvantpur/Malleswaram/RajajiNagar/IISc/Palace Orchards/Vijayanagar areas)
Cantonment Rly. Stn./Vasanth Nagar
(Preferable if you are coming from/through MG Road/Shivaji Nagar/JayaNagar/Majestic/High Grounds)
Miller Road Underpass
Preferable if you are coming from/through Ulsoor/Indira Nagar/Coles Park/Fraser Town/KR Puram/Banaswadi)
Directions From Mekhri Circle:
o Take the road towards Cantonment Rly. Stn. (Jayamahal Main Road)
o As you go beyond the TV tower, and then the Funworld, you will cross a small circle (In front of JC Nagar Police Station). The road sort of bifurcates around a HP Petrol Bunk. You are to take the left flank (Nandidurg Road).
o Continue on the Nandidurg Road. You will cross Canara Bank on your left and reach Airtel/Cypress Technologies Office (Also on your left).
o Take a right turn just after the Airtel Office and you will hit the Jayamahal Park. The Puja is adjacent to it. Take a left turn!
Directions From Cantonment Rly. Stn./Vasanth Nagar:
o Pass the Cantonment Rly. Stn. underbridge and take the road on left to proceed towards the TV Tower/Mekhri Circle.
o Take a right turn the first break in the median (next to SBI/Wine & Cheese/Women’s World.
o Continue on this road (5th Main). This road curves, and leads you to Jayamahal Park. The Puja is held here.
Directions From Miller Road Underpass:
o Come up from the underpass from the Ulsoor side (proceeding towards Bangalore Cantonment Rly. Stn).
o Take a right turn into Nandidurg Road (first major right turn) to proceed towards the TV Tower/Mekhri Circle.
o Continue on the Nandidurg Road till you cross NEFERTITI, a Floral Boutique, on your left (You can see the Airtel/Cypress Technologies Office on your right).
o Take the second left turn after Nefertiti (just before the Airtel Office) and you will hit the Jayamahal Park. The Puja is adjacent to it. Take a left turn.
Jayamahal Samiti
Jayamahal Puja Blog
DON’T MISS IT. EVER!
2. THE BENGALEE ASSOCIATION
RBANMs (Exhibition) Ground, St. Johns Road (Off Commercial Street) — Opposite Ajanta Theatre – Close to Ulsoor tank. This is the biggest Durga Puja in Bangalore.
Bengali Association
3. SOCIO CULTURAL ASSOCIATION (INDIRANAGAR PUJA)
Defence Colony Play Ground, Indiranagar. New location this time, but easy to locate — on 6th Main, Between Indiranagar, 100 Ft. Road and 80 Ft. Road.
Puja site
4. PROBASI ASSOCIATION
Malleswaram Canara Union Hall/BPL Prakash Padukone Badminton Academy on 8th Main, 13th Cross, Malleswaram – Not far away from MES College — (8th Main starts from Yesvantpur circle and goes toward Malleswaram Rly. Station. Malleswaram addresses are easy to locate once you know the Main & Cross).
5. NORTH BANGALORE CULTURAL ASSOCIATION
“Mandir”; 8A, FTI Colony, Nandini Layout, Bangalore 560096. This is near Nandini Layout Bus Stand. By the way, Nandini Layout is opposite to ISCON Temple — on the other side of Chord Road — you have to go inside some distance.
6. SOUTH BANGALORE CULTURAL ASSOCIATION (JP NAGAR PUJA)
Usually, at the junction of Bannerghatta Road and Outer Ring Road in JP Nagar. In NGR Kalayana Mantapa, Bannerghatta Road, JP Nagar, 2nd Phase. A Kalyana Mantapa opposite to Shoppers Stop.
7. SHARATHI SOCIO CULTURAL TRUST (KORAMANGALA PUJA)
‘Police Choultry’ (Mangala Kalyana Mantapa, 8th Block, 80 Ft. Road, Koramangala) opposite Ganesh Temple.
If you come from FORUM towards National Games Village, after some distance you will find this Puja on your left side.
If you are coming from SONY WORLD crossing, come upto National Games Village main gate, take a right turn on the road which leads to Forum — Police Choultry is on your right.
8. WHITEFIELD CULTURAL ASSOCIATION
C/o Chetan Building, Beside WhiteField Police Station, White Field Main Road.
9. POORVA BANGALORE CULTURAL ASSOCIATION (ITPL ROAD)
VSR Convention Hall, ITPL Road, Brookfields. It is reached crossing Marathahalli railway overbridge. Take the first left turn going towards ITPL, the Choultry is on your left about 1km ahead, next to Café Coffee Day.
10. ANTARANGA BENGALI CULTURAL ASSOCIATION (SANJAY NAGAR PUJA)
Ramana Maharishi Centre for Learning, Post Office Road, Sanjay Nagar.
Take the Sanjay Nagar Main Road from Gangenahalli on Bellary Road — go ahead about 1km to reach FoodWorld. Take the Post Office Road, which is next to it. The puja is on your left, a few steps away.
11. VIVEKANANDA CULTURAL ASSOCIATION (YELAHANKA PUJA)
Seshadripuram 1st Grade College Campus, opposite Railway Reservation Counter, New Town, Yelahanka, Bangalore 560064.
12. AIR FORCE STATION, JALAHALLI WEST
Reach the AF Station, Jalahalli West, and inquire at the gate.
13. AIR FORCE STATION, JALAHALLI EAST
Reach AF Station Jalahalli East, and inquire at the gate.
14. SHARATHI FORUM (Koramangala 2nd Puja)
Munireddy Kalyana Mandapa, 80 Ft. Road, 6th Block, Koramangala. This is next to Post Office (opposite puja # 7).
15. BANGALORE RURAL ASSOCIATION
This is at Attibele, Hosur Road. Sidla Basappa Nanjamani Charitable Trust, Attibele. Beside Attibele Police Station, and near the Attibele bus terminal circle.
16. BANASWADI BENGALI CULTURAL UNION
Sitarama Kalyana Mandap, Banaswadi Main road, Bangalore-560 043 — Near Uttam Sagar Restaurant.
* Through RamaMurthy Nagar Ring Road Circle: Come straight about half km on Banaswadi Main Road, it will be on right side.
* If you come from the ITC Factiory side: Cross Rly. overbridge; after another half km, it will be on left side.
* From Hebbal side through Ring Road: After Hennur Ring Road Circle, take the next Circle (Royal Concorde School).
* Kalyana Nagar Circle: Go straight upto Banaswadi Main Road and take left turn, it will be on your left.
17. RT NAGAR SARBAJANIN DURGA PUJA SAMITI
Sai Baba Mandir, HMT Layout, Anand Nagar, next to RT Nagar Bus Depot.
You can take the road next to CBI office that takes off from Bellary Road towards RT Nagar Main Road. Go to the end, then take a left turn. Go across the BMTC Depo and reach the Sai Baba Temple.
Puja Blog
18. MURUGESHPALYA (AIR FORCE)
Air Force Puja: After you
enter Wind Tunnel Road from Airport Road, halfway on Wind Tunnel Road, there is a driveway that takes you into an Air Force Campus. This is probably opposite Rifco Apartment. A sureshot way to not miss it is to realize that the Air Force Campus wall stretches from Airport Road halfway into Wind Tunnel Road.
19. COMMAND HOSPITAL, ULSOOR
If you go from MG Road towards the Airport, you will notice a left turn just before Command Hospital pops up on your left. Entering this left turn, you’ll find yourself deep inside the defence’s property. A few hundred metres in, there is a circle where you have to enter the hospital gate on the right. Inside you wind along towards the commotion and presently you’ll find yourself at a large playground where the puja is held.
20. AIR FORCE TRAINING COMMAND, MEKHRI CIRCLE
Travel along Bellary Road from the city centre (Windsor Manor or Cauvery Theatre) towards Hebbal. As you cross the Mekhri Circle underpass, you will see an entrance to an Air Force Campus on the left side. The puja is almost just inside the gate.
21. GEO HOTEL
Near Corporation, beside GEO Hotel.
22. HEBAGUDI DURGA PUJA
This is near the Hebagudi bus stand, beside BIOCON factory, Hosur Road.
Somnathda would also like to thank a lot of bloggers and the respective Associations from whom the information was gathered.
Friends, I am also available at Jayamahal Puja, so those wanting to meet up, are most welcome there. Everyone, have a great, great Durga Puja.
Mentor Graphics: DFM is where all the value is!
As promised, here is the concluding part of my discussion with Joseph Sawicki, vice president & GM, Design to Silicon Division, Mentor Graphics.
We went over the design for manufacturing (DFM) challenges and how yield can be improved. He also touched upon the design challenges in 45nm and 32nm, respectively.
Given that the semiconductor industry does speak a lot about DFM, what steps are being taken to improve on the overall yield?
According to Sawicki, in the VLSI microchip era, yields started at 60-70 percent, and so DFM wasn’t required. However, in the nanochip era, DFM is where all the value is. [VLSI Research.]
Joseph Sawicki, vice president & GM, Design to Silicon Division, Mentor GraphicsHe added that at smaller geometries, manufacturing variability has a much greater impact on timing, power dissipation, and signal integrity. Traditional guardbanding is no longer sufficient to guarantee competitive performance at acceptable yields, and excessive design margins erase the advantages sought by going to the next node in the first place.
Moving to advanced technologies without dealing effectively with manufacturing variability can actually put a design at a competitive disadvantage due to low parametric yield.
“Successful IC implementation requires a detailed understanding of how variability affects both functional and parametric yield. Customers need a manufacturing-aware engineering approach that extends across the entire physical implementation life cycle, starting with cell library development and extending through place and route, physical verification, layout optimization, mask preparation, testing, and failure analysis.
“They need a design flow that helps them “co-optimize” for both performance and yield simultaneously, based on accurate models of manufacturing process variability. The ability to do this quickly and effectively can give IC designers a powerful competitive advantage,” Sawicki said.
There is no silver bullet! It takes a broad-based, well-integrated approach to have a significant and consistent impact on manufacturability.
According to him, Mentor Graphics provides a complete manufacturing-aware design-to-silicon solution addressing random particle effects, small-scale device and interconnect interactions, lithographic distortions and process window variations, and thickness variations resulting from chemical-mechanical polishing (CMP) and variable film deposition and etch rates.
“Our tools incorporate comprehensive, highly-accurate models that have been tuned and verified for specific manufacturing environments, and address every stage of the digital IC implementation life cycle,” he added.
So, how is Mentor handling 45nm and 32nm design challenges?
Sawicki added: “Advanced process nodes present challenges at every stage of IC implementation, from place-and-route, through physical verification, layout enhancement, testing and yield analysis. Mentor has a complete design-to-silicon flow that addresses the critical challenges of IC implementation at every stage.”
Yindusoft rocks embedded domain for India across Apac
India has, for long, been the acknowledged ’embedded superstar’ of the world! It is in no danger of losing that top position, especially in the near future, as several Indian firms in the embedded space continue to rock the world.
One such company is Yindusoft, established 2006, a software services company focused on the following domains: embedded software for IC design houses, OEMS/ODMS in consumer electronics; IT solutions in the semiconductor manufacturing sector; and distribute and customize higher end IT software products in the two areas.
G.K. Pramod, CEO, and a former member of Cybermedia/IDC said: “We are a two-year old company! We cover Asia Pacific especially, Taiwan and Singapore. We would like to expand into Korea and Japan, hopefully, by the end of Q4 2008.”
Yindusoft is present in two domains: providing IT solutions to large semiconductor manufacturing companies, being the first. Pramod said: “We are working with companies like TSMC, UMC, etc. We work with them in CIM (computer-integrated manufacturing). We recently completed a project on wafer analysis in Taiwan. Our engineers developed the software to cut the wafers into precise shapes. We have onsite engineers with TSMC in Taiwan and UMC in Taiwan and Singapore. Now, we are aggressively positioned ourselves in the CIM space for semiconductors.”
The second important domain are OEMs/ODMs. Yindusoft develops embedded software for OEMs/ODMs. Pramod added: “We develop the software for these companies. In Taiwan, we have done work on digital signage systems. We worked on the UI design. We did development on the UI design itself, along with market research, and therefore, the customer received market feedback as well.”
Yindusoft has two recent design wins: designing of digital signage application for a large OEM/ODM in Taiwan. and designing of set-top box application for a large OEM/ODM in Asia Pacific.
Commenting further on Yindusoft’s design wins, he said: “We completed a large project in the area of digital signage product development with the help of an embedded product development domain expert. Our domain consultant adopted methods like market research, making global product feature list and getting the UI design development from design experts who are from art and design background (and, not IT background).”
Too early to estimate Indian semicon
Pramod added that it was quite early to estimate the strength of the Indian semiconductor industry as fabs are yet be commissioned for production. The Indian embedded design industry is estimated at $4-5 billion in 2008-09.
Commenting on the drivers for embedded design, Pramod said these could be the design capabilities of Indians and the requirement of low-cost consumer products. “Big markets like India and China would require lot of consumer devices for common man applications,” he said.
Customers expect strong domain expertise today. Definitely, and I completely agree on this,” he added. “We need domain expertise to speak the “customers’ language, make the project successful and show the differentiating factors in our service delivery.”
As mentioned, Yindusoft also works with the STB companies. “We are developing an STB (Set-top box) application. Typical applications would be PVR, email application, parental security, etc.,” he said.
Yindusoft is also trying out a model called offshore solutions center. Pramod said: “We have identified pain areas of customers, like OEMs/ODMs and semicon companies. Till such time the companies don’t develop the necessary software skills, there orders can get rejected. They can’t add value to their products. Therefore, profitability is a major issue with them. Next, they also have a language problem and cannot provide the essential technical support. Also, they cannot enter the Indian semiconductor market because of these reasons.
“Hence, we are now trying to build up a solution for them. One is the ODC, which is regular. The second factor: localization of their product for the Indian market, is an example. We also have a demo center. We conduct the market research for a particular product and then set up a demo center in India for that product. After that, there’s the technical support center.”
Way forward for embedded
Would the biggest growth factor for embedded come from localization of product design and manufacturing from India? What’s the way forward?
Pramod said that the biggest growth factor for embedded could come from the localization of product design, and it will be the driving factor. “In fact, we provide this as a value addition to our customer, he added. “Indians need to focus on designs, which is our core strength.” However, he felt that China would still lead in manufacturing.
Finally, what did the Indian semiconductor industry offer to the world, and why should the others should come here?
Pramod listed six key capabilities: Design capabilities of Indians; VLSI design, IC design capabilities; software integration capability; good software knowledge; India is also a good pilot market to launch new embedded products; and India is a strategic location for Asia Pacific markets where there is a good ecosystem for the semiconductor industry.
The company’s head office is located in Bangalore, while it has two overseas offices in Taiwan and Singapore, respectively.
Yindusoft’s vision is to be the leaders in providing software services for IC design houses, OEM/ODMS and semiconductor manufacturing companies.
The mission is to act as a software consultant in new product development by providing cost effective co-working models and establish offshore solution centers (OSC) in India. Best of luck!
Mentor on EDA trends and solar/PV
This is a continuation of my recent discussion with Joseph Sawicki, vice president & GM, Design to Silicon Division, Mentor Graphics.
There have been whispers that the EDA industry has been presently lagging behind semiconductors and is in the catch-up mode. “That’s a matter of perspective. There are definitely unsolved challenges at 32nm and 22nm, but the reality is that we are still in the technology development stage,” he says.
For EDA tools that address implementation and manufacturing issues (i.e., Mentor design-to-silicon products), there are dependencies that cannot be fully resolved until the process technology has stabilized. Mentor Graphics is laying the groundwork for those challenges and working in concert with the process technology leaders to ensure that our products address all issues and are production-worthy before the process technology goes mainstream.
On the other hand, although Mentor’s products are fully-qualified for 45nm, there have only been a handful of tapeouts at that node, so for the majority of customers, we are ahead of the curve.
On ESL and DFM as growth drivers
ESL and DFM are said to be the new growth drivers. Sawicki adds: “As Wally Rhines has said in his public presentations, system level design and IC implementation are the stages of development where there are the most challenges, and therefore the most opportunities. To continue the traditional grow spiral that the electronic industry has enjoyed as a result of device scaling, we need more sophisticated EDA solutions to deal with both of these challenges.”
ESL is responding to the growth of design complexity and the need for earlier and more thorough design verification, including low power characteristics, and software integration.
The Design-to-Silicon division is addressing the issues of IC implementation which result not only from the increase in design complexity and devices sizes, but also from increasing sensitivity of the manufacturing process to physical design decisions, a phenomenon often referred to as “manufacturing variability.”
Although the term “Design-For-Manufacturing” reflects the need to consider manufacturability in design and to optimize for both functional and parametric yield, it is important to emphasize that DFM is not simply an additional tool or discrete step in the design process, but rather an integration of manufacturing process information throughout the IC implementation flow.
With single threading, we can no longer handle designs over 100 million gates. Of course, at 45nm, you can do a 100mn gates. That rewriting process is another issue that is also slowing out. It would be interesting to see how is Mentor handling this.
According to Sawicki, Mentor has incorporated sophisticated multi-threading and multi-processing technologies into all of its performance-sensitive applications, from place-and-route, through physical verification, resolution enhancement and testing.
He says, “Our tools have a track record of impressive and consistent and performance and scalability improvements, which is why we continue to lead the industry in performance.”
In addition to merely adding multi-threading and support for multi-core processors, Calibre products have a robust workflow management environment that automatically distributes the processing workload in the most efficient manner across any number of available clustered computing nodes.
Mentor’s Olympus-SoC place-and-route is inherently scalable due to its advanced architecture which includes an extremely efficient graph representation for timing information, and a very concise memory footprint. In addition, all the engines within Olympus-SoC can take advantage of multi-threaded and multi-core processors for high performance. These features enable Olympus-SoC to handle 100M+ gates designs in flat mode without excessive turnaround time.
Mentor’s ATPG tools are also designed to operate in multiprocessing mode over the multiple computing platforms to reduce test pattern generation time. In addition, Mentor test pattern compression technology reduces test pattern volume and test time, making it feasible to fully test 100M gate devices and maintain product quality without an explosion in test cost.
With EDA is starting to move up to the system level, will this make EDA less dependent on the semiconductor world?
Sawicki agrees that there are challenges at both the front end and back end of the electronic products design and manufacturing life cycle. Both of these opportunities are growing. In addition, developments like multi-level (3D) die packaging, through-silicon via (TSV) structures and other non-traditional techniques for device scaling are pushing system and silicon design issues closer together.
Reaching the 22nm node will require highly compute intensive EDA techniques for physical design to compensate for limitations in the manufacturing process. Beyond that, we could see a major shift to new materials and manufacturing techniques that would open new green fields for EDA in the IC implementation flow.
EDA going forward
How does Mentor see the EDA industry evolving, going forward?
Sawicki adds: “There are three key trends to watch. Firstly, for design to remain affordable at the leading edge, we need to enable radical increases in productivity. Electronic System Level (ESL) design is the key here, allowing designers to move to a new level of abstraction for both design and verification.
“Secondly, the challenges of manufacturing a well-yielding and reliable device as we move to 22nm will require a far more sophisticated physical implementation environment—one that accounts for physical effects in the design loop, and accounts for manufacturing variability in it’s optimization routines.
“Finally, the manufacturing challenges also open significant opportunity for EDA in the manufacturing space. A great example of this is the September 17, 2008 announcement we did with IBM on a joint development program to enable manufacturing at the 22nm node.”
Finally, given the roles already defined by Magma and Synopsys in solar, is there an opportunity for EDA in solar/PV?
According to Sawicki, as the photovoltaic devices have very simple and regular structures, most of the opportunity for EDA is not in logic design tools, but in material science, transistor-level device modeling, and manufacturing efficiencies with a focus on conversion efficiency and manufacturing cost reduction.
EDA’s role in solar will be in the newer areas related to Design-for-Manufacturing and other manufacturing optimizations, he concludes.
Our last discussion on DFM will follow in a later blog post!
Building a good solar ecosystem in India
Solar/PV has been doing the rounds consistently, and has probably now become one of the most hyped sectors.
In fact, renewable energy has never ever had such a good time! As mentioned, a tremendous hype has already been built around solar photovoltaics. Several companies, in India, and elsewhere, have also jumped into the solar bandwagon.
So what are the reasons behind this ‘sudden’ interest in solar? According to Dr. Ashok Das, managing director, Solar Solutions, and a well know expert in this area, consumers do not yet drive the solar energy sector. Being energy, it is mostly driven by the government and its subsidies.
So, why has there been this ‘sudden interest’ in solar? There are two reasons.
First, the climate change issue started getting center stage at world forums, leading to policies and targets to cut global warming, and hence boosting renewable energy. Second, the soaring oil prices and continued dependence on a few countries for oil has led to the realization of the energy security.
There are several takeaways from the European experience with solar. Dr. Das says that Europe, particularly, has taken solar very seriously. They have been a leader in solar. “Germany, for instance, gave away all of the necessary subsidies to attain energy security. These subsidies have led to the solar boom. It has also led to an increased R&D to bring down the cost of solar energy.”
Nevertheless, he adds there seems to be a bubble forming in this sector, like all other booms in the past. The industry will go through consolidation as the market matures.
And where does India stand in comparison? According to Dr. Das, steps are being taken to promote solar energy in India. “As of now, the feed-in tariff is Rs. 15 for photovoltaics and Rs. 12 for thermal solar. The government also announced a mandatory 5 percent renewable energy mix in the electricity production.
“The PMO (Prime Minister’s Office) has also issued a National Action Plan that has plans for boosting solar. These subsidies are driving some of the increased activities in India.”
He contends: “We need stronger lobbying so that better subsidies can come through. Therefore, most of the manufacturing activities in India are still driven by the export markets.”
Surely, given the surge of investments in solar within India, there is every room for developing a very good ecosystem.
Dr. Das says: “Coming to the solar ecosystem, we already make solar products, as well as the modules. We also have the capability to make cells. The only part missing has been wafer, the silicon for solar.
“A few silicon factories should be coming up in India soon. So, India can easily establish the entire ecosystem for solar photovoltaics.”
Postscript: More investments in solar today, in India. According to Hindu Business Line, there have been three additional investments worth Rs. 55,000 crores.
Vavasi Telegence to invest Rs 39,000 crore for solar PV and polysilicon unit; EPV Solar to invest Rs 4,000 crore for solar PV unit; and Lanco Solar to invest Rs 12,938-crore for solar PV and polysilicon unit.
A word of caution: It’s advisable not to get carried away by all the success in solar. Solar is/was only part of the ecosystem units in the Indian semicon policy.
Don’t forget semiconductors!
While this success in solar does augur well for the solar industry in India, don’t think this is even close to what the Indian semicon policy, launched with fanfare last September, originally set out to achieve!
Despite EDA challenges, Mentor keeps faith on India
Great! All of these EDA firms, despite their current financial woes, remain strong and bullish on India! Mentor Graphics is no exception in this case!
It is well documented that the global EDA industry, along with the global semiconductor industry, has not had a smooth ride this year. However, this situation has only made both the industries work harder toward restoring some recovery.
Thanks to Veeresh Shetty, a dear friend, and Marcom Manager-Pacrim South, Mentor Graphics, I had the pleasure of meeting up with Joseph Sawicki, vice president & GM, Design to Silicon Division, Mentor Graphics Corp., during the recently held EDA Tech Forum in Bangalore.
We discussed a range of issues, such as the state of the EDA industry, Mentor’s focus on India, and low-power design challenges. I did not discuss the proposed acquisition of Mentor by Cadence, as I feel it is no point in going over what was never on the cards, at least, for now.
According to Sawicki, Mentor Graphics is very optimistic about semiconductors and electronics, especially in India. “The EDA industry is currently having a pretty challenging environment. The recession in 2002 was the deepest in its history,” he says.
“We (the EDA industry) haven’t had the growth rates we would like. However, we have done better. We have re-invented Mentor,” adds Sawicki. “We have now invested more in back-and-route ICs, which is about 40 percent of our revenue. Our product portfolio is the youngest within the company.” He adds that the recession has been more in semiconductors. However, take out memory, and the scenario changes.
The drive of the semiconductor industry toward smaller and smaller features sizes requires more sophisticated correction methods to guarantee the final tolerances for the etched features in both wafer manufacturing and mask making.
Flat growth likely for EDA
Commenting on EDA industry’s growth, Sawicki, adds that growth will be flat in 2008. Interestingly, the growth rate for EDA was 10 percent during the last two years. He notes: “EDA always does best when it delivers new technology. There are two reasons. One, on the manufacturing side of things. The extra results will be completely delivered by the software.”
The other reason is that the aspects of manufacturing power and manageability will assume great importance. “Finally, the ESL space also provides the potential for growth. It also brings out a whole new design capability,” he notes.
Given the global semiconductor scenario, Mentor is also looking at other markets outside semiconductors, especially automotive. Sawicki adds that this quarter, 20 percent of Mentor’s business has been from the automotive segment.
There have been several global initiatives aimed at consolidation in the recent past. Sawicki says: “Consolidation should not be looked at as a goal. We also do acquisitions in the technology space. It augments a strong position.”
So what are some of the other challenges facing the industry? Sawicki lists those as the economics of the industry itself, especially the design and verification costs.
On low power design, Sawicki agrees that there has been a transition of electronics from the US to Asia. “You have got to handle far lower power downward. We can reduce leakage current by 20-30 percent. Looking forward, how do you tie in ESL with physical design? When doing ESL, you can do architectural exploration. I will have my ESL to drive the place-and-route tool. I can get fast execution as well as low leakage power.”
He advises that India has the ability to go beyond the innovation that has been happening.
Mentor in India
Mentor Graphics has three sites in India. It has R&D centers in Hyderabad and Noida, near New Delhi, and a sales and support office in Bangalore. The Hyderabad R&D center handles system design, while the Noida R&D center takes care of the front-end side, such as functional verification products.
Raghu Panicker, sales director, India, Mentor Graphics, says that the company has been very bullish on India. “We do not see any lull anywhere. Lot of design starts are happening here, in India,” he adds.
I will continue my conversation with Joseph Sawicki in the next blog!
Synopsys' Dr Chi-Foon Chan on India, low power design and solar
There have been reports about the troubles within the EDA industry in recent times, especially those related with quarter sales. Interestingly, Synopsys has been the one sailing along fine! If that’s not enough, it made its intention known of playing a role on the solar/PV segment, an area where lot of investments have been happening!
Given this scenario, I was fortuitous enough, rather, extremely lucky to be able to get into a conversation with Dr. Chi-Foon Chan, President and Chief Operating Officer, Synopsys Inc., during his recent visit to India.
On the state of the global semiconductor industry, he said, it was somewhere now in the low 10s [well below 10 percent]. The EDA industry is currently tracking below that level. However, Synopsys has been growing at around 10 percent. He said, “The technology challenges today are very high.”
Synopsys has a substantial number of R&D population based out of India. Giving his assessment of the Indian semiconductor industry, Dr. Chan added: “Our main interest in India is largely talent and the academia. India can very well get more into the product development side. Even the outsourcing of designs have increased. Our capabilities, of the Indian team, have also increased.”
As with any good semiconductor ecosystem, the Indian industry also needs a proactive industry association, a role played to near perfection by the ISA (India Semiconductor Association). Acknowledging the ISA’s role, Dr. Chan said, “The ISA has also formed a very cohesive team.”
There is little doubt about India’s growing importance in technology strengths and managerial leadership. Dr. Chan added: “We are more on the high-end side and also track what others design. In India, the profiles of designs are definitely high-end in nature. This is largely due to the presence of a large number of MNCs. A very high percentage of designs are in the 45nm and 65nm process technology nodes.”
There is another significant indicator of India’s growing importance, and that is the huge rise in the attendance of the SNUG. In 2000, this event attracted 180 people. However, in 2008, the SNUG attracted over 2,000 people.
Moving India to next level
Given the very high level of commitment on Synopsys’ part toward India, there was a need to find out from Dr. Chan what exactly India needs to do to move to the next level in the value chain in the semiconductor ecosystem.
He advised: “India can do two to three things. One, for the system to grow, you need the government, academia and industry to grow together. India has all of the ingredients required to drive products.”
Comparing India with China, he highlighted the fact that while in China, the local consumption was higher than local supply, that was not the case with India!
“Therefore, looking at merely the local market is not the only thing. Products developed here can also be targeted at the Middle East and Southeast Asia.” He was quite forthright in his analysis, adding: “Industries start when you find markets. The skill sets are already present here. There can well be multiple startups.”
Dr. Chan also touched upon the fab vs. fabless issue, noting that there could well be more of fabless companies in India. “Building a fab requires lot of capital. Also, consolidation will continue to happen.”
What role does Dr. Chan see Synopsys playing in the Indian context? He said: “Synopsys will continue to be a catalyst for the industry. A healthy design industry in India continues to help us. We also work well with the Indian universities. Having more people from the universities will always help. We also invest a lot in application support. The application team also trains others. I now look forward to seeing more fabless companies here and India to become even more global.”
On low power design
India is also a centre of expertise in low power design, given that low power is hugely important in today’s electronics ecosystem. Dr. Chan commented that low power has always been the number one design issue. It cannot be taken care of at one single stage.
He added: “A slightly new concept that has emerged is low-power verification. There are so many schemes for attacking low power, such as multiple voltage islands. We (Synopsys) are spending a lot of effort in low power.
“As a designer, you require detailed analysis. Low-power verification is now coming up. Another area is testing. As an example, if so much power is required, how do you have the power cut from the tool you are using to test? From a Synopsys point of view, we are involved in several points, such as front-end synthesis, testing, sign-off, verification, etc. We are trying to put in a whole lot of methodologies.”
Synopsys in solar
EDA may be able to help by lowering power requirements and leakage on better products. Especially, the Synopsys’ TCAD product can be used to create more efficient and effective solar cells. Now, this is not a new development anymore. Synopsys, along with Magma, have already made known their intentions about setting foot in the solar/PV space.
On the TCAD, Dr. Chan said: “We have a very strong position in the TCAD, commercially. Now, it is one of our most critical elements in high-performance. Our TCAD is among the strongest in the EDA industry.
“In solar, it does not have to be a complicated place-and-route, etc. From an entire solar industry point of view, we have now used some effort from TCAD into this space. Heat transfer issues, etc., are more in the EDA space.”
I will continue my conversation with Synopsys on its solar initiative sometime later. Keep watching this space, folks
Pradeep Chakraborty 