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Indian semicon industry poised at very interesting juncture: Dr. Pradip Dutta, Synopsys
Dr. Pradip Dutta, corporate VP of Synopsys Inc. and MD of Synopsys (India).
I have known Dr Pradip Dutta, corporate VP of Synopsys Inc. and MD of Synopsys (India), as well as vice chairman, India Semiconductor Association (ISA), and now, chairman designate for 2011, ISA, for close to a decade now. We recently got into an interesting discussion on the Indian semiconductor industry.
Growth of semicon and electronics in India
First, I asked what should be done about the growth of semiconductors and electronics in the Indian eco-system?
Dr. Dutta said: “My view on this subject has been the same for many years now; high-tech electronics has to be a national mission. The defense and the government labs played a major role in promoting this sector in the US; e.g. Sandia National Laboratory, Lawrence Livermore Laboratory, Jet Propulsion Laboratory, NASA etc. DARPA, which is part of US Department of Defense has sponsored phenomenal amount of research in semiconductors and electronics.
“If we now look at countries closer to our part of the world, in Asia, we will see a similar focused effort from the governments. The STARC initiative in Japan, the National SOC program in Taiwan, the 839 program in Korea, the 863 program of Ministry of Science and Technology in China, all catered to a flourishing investment in R&D and innovation in high tech. Our country is poised for it too. We need to encourage start-ups in fabless design, explore manufacturing, foster innovation, create favorable policies for the industry and most certainly develop the talent pool.”
Need for domestic manufacturing
There is a need for domestic manufacturing in high tech electronics. Where are the Indian companies going? According to him, domestic manufacturing in high tech electronics has been flagged as a critical area in the ESDM (Electronic Design and Manufacturing) report that was submitted to the government by the industry in 2010. There is a need for initial funding, both in R&D as well as manufacturing. Duty structures need to be rationalized between import of CBU, SKD, CKD and components.
He added: “We have seen that manufacturing prospers in cluster environment and hence there is a recommendation to promote manufacturing clusters for specific product categories. However, it is safe to say that we have long ways to go in this area.”
Co-operation with international trade bodies
Now, what is the required policy framework and co-operation with international trade bodies? As per Dr. Dutta, the ISA has been active in forging close working relationships with multiple trade bodies from various parts of the world. “We have signed several MoUs with entities such as HTIA (Israel), ASTSA (Japan), DSP Valley (Belgium), TSIA (Taiwan), Semi (USA), GSA (USA) and UKTI (UK).
“Of course, we need to have a focus and these relationships should be driven by strategy. We have carried several delegations to these countries and hosted bi-lateral visits as well. These visits provide an opportunity for our member companies to have direct B2B opportunities.
“We learn valuable best practices from other entities and try and implement in our environment. For example, Israel does a great job in taking innovative ideas from entrepreneurs to incubation, many times inside of universities, and then spinning them into companies which later become part of the global value chain. In the process, this small country has created at least 150 NASDAQ listed high tech firms. Innovation to incubation to wealth creation – a formula that works very well there. We could certainly learn a lot from that model.”
Future of Indian semicon industry
So, how does Dr. Pradip Dutta see the Indian semicon industry, going forward? He said: “The Indian semiconductor industry is now poised at a very interesting juncture. While the MNCs are designing chips at the bleeding edge, we see a lot of high quality work being done by the design service companies and also local start-ups. Incidentally, the start-up scenario is quite active in the system space. This ties in with the ESDM focus of our industry. Read more…
EDA Tech Forum 2010: Nanoscale regime and social product innovation!
Here, I shall discuss the main points of the two keynotes by Dr. Kota Murali, lead scientist & program manager of nanotech, IBM India, and Manjunatha Hebbar, VP & Head – Strategic Services, HCL Technologies Ltd — my good friend and fellow board member at the Indian Microelectronics Academy (IMA).
Nanotech for a smarter planet
Dr. Kota Murali, lead scientist & program manager of nanotech, IBM India @ EDA Tech Forum 2010.
Dr. Kota Murali, lead scientist & program manager of nanotech, IBM India, presented on nanotech for a smarter planet. The motivation for nanotech at IBM has been — since IT has grown as devices have shrunk. Now, we have reached the nanoscale level. The challenge is: how do we take new technologies to markets?
He briefly touched upon IBM’s latest generation processor, the Power7, built on 45nm. The next generation Power8 processors are supposed to be built on 22nm/32nm.
He said that physical and chemical properties of materials depend on the size. Hence, it is important to use nano and quantum scale properties for next generation devices. There is this classical scaling reality — to maintain generational performance gains, supply voltage is not scaled ideally, leading to major power issues.
In the future, innovation, scaling and power will drive performance. Power will play a critical role in developing next-generation products.
On the novel high-K metal gate (HKMG) devices, these gates are already four monolayers thick. We need HKMG since it significantly reduces gate leakage and chips consume lesser power. Also, it allows equivalent oxide thickness. The shrinking of transistor dimensions can continue unhindered.
Dr. Murali highlighted chemical quantization — which allows changes in device parameters, as well as energy quantization — which leads to changes in the fundamental current-voltage characteristics of a transistor. A material’s resistance can also change in the nanoscale regime.
GIDL or gate-induced drain leakage is quite relevant to low power devices. GIDL leakage currents are becoming prohibitively high. While HKMG has solved the tunnelling problem, the GIDL issue still remains. Rotating the conventional wafer from <110> to <100> reduces the GIDL by an order of magnitude.
Next, what’s the alternative to CMOS devices? These could be 3D transistors with better gate control at 15nm and beyond as well as carbon nanotubes. I checked the Web: carbon nanotubes are molecular-scale tubes of graphitic carbon with outstanding properties. They are among the stiffest and strongest fibres known, and have remarkable electronic properties and many other unique characteristics. Excellent!
Finally, how do you pattern all of these devices? Computational lithography enables density scaling. Challenges include pattern optimization tool, code parallelization, HPC and optics.
Spin electronics could be the next evolution — leading to spintronics devices at nanoscale. Here, IBM’s Giant Magnetoresistive Head, which has been a giant leap for IBM Research, comes into play.
Social product innovation
Manjunatha Hebbar, VP & Head - Strategic Services, HCL Technologies makes a point!
In his keynote, Manjunatha Hebbar of HCL Technologies stressed that innovation is required at every level across the entire value chain. A compelling alternative would be the social product innovation, or democratization of product innovation.
Benefits of social product innovation are manifold. The prime ones are —
* right product for the right market at the right time at the right price;
* lowest direct cost; sharing of risk and reward;
* real-time on demand access to resources; and
* organic transformation with the market.
He cited the example of Apple’s iPhone, which was launched during the peak of recession. The rest is history, as this smartphone went on to change the dymanics of the mobile phone market!
Hebbar highlighted that the society itself has core values of social product innovation. The core purpose — help everyone have their lives! The focus should be on process innovation and prodct innovation, leading to business innovation.
Today, everyone is on the cloud, mobile, connected and reading everyone. Creative commons is the most accepted license model today. Co-creation is always welcome.
EDA Tech Forum 2010: Delivering the latest in 10X design improvements
Pravin Madhani, GM, Place and Route Division, Mentor Graphics.
I’ve just returned from Mentor Graphics’ EDA Tech Forum 2010, titled: Delivering the latest in 10X design improvements. The opening keynote by Pravin Madhani, GM, Place and Route Division, Mentor, could have been better — well, Dr. Walden C. Rhines, chairman and CEO, Mentor, had also delivered a similar lecture at this year’s VLSID 2010 conference.
However, the other two keynotes — by Dr. Kota Murali, lead scientist & program manager of nanotech, IBM India, and Manjunath Hebbar, VP & Head – Strategic Services, HCL Technologies Ltd, lived up to their billing.
The photomask industry is between the proverbial hard rock and the hard place. For instance, at 32nm, the mask cost works out to be $2 million today. In his keynote, Madhani said that the manufacturing industry would surely figure out a way to control mask costs.
Even fab costs are pretty high today — estimated at $50 billion in 2010, that is ~10 percent of the annual market. The global fab industry continues to figure out how to decrease costs. While design costs are projected to grow logarithmically, cost per function will continue to decline long after Moore’s Law is obsolete.
So, will we have any use for so many transistors? Down the years, growth in unit volumes has always distinguished the semiconductor industry. The semicon industry has been growing at 13 percent (10-year CAGR), while transistors have grown at 49 percent. These sit very well, as compared to say, computers – 9.3 percent, steel — 5.3 percent, and automobiles — 0.1 percent. The 49 percent transistor growth drives the semicon industry.
Madhani said that the note/netbook market seems to have several years of growth ahead. The Apple iPad has also created a new segment. Cell phone adoption has been in high-growth mode in the emerging markets. Smartphones are changing the video dynamics.
So, will applications require 10K more transistors by 2018? And, do we have the necessary design tools? Well, there will likely be a ~10K increase in transistors over the next eight years, going up to 40 billion transistors by 2018. Therefore, the industry will require tools ready now in order to design for 2018.
Four principal areas will require 10X improvements in design methodologies — system level design, verification, embedded software development, and back-end physical design and test. A 10X increase in the number of transistors will also require 1000X increase in verification.
In summary, reduction in costs per functionality will continue on a predictable learning curve long after Moore’s law is obsolete. The industry will also witness ~10X increase in transistors over the next eight years, leading up to 40 billion transistors by 2018.
Synopsys' Dr. Aart de Geus at SNUG 2010 India!
Dr. Aart de Geus - CEO & Chairman of the Board, Synopsys Inc. at SNUG 2010 India.
To make the ‘machine’ called SoC work, one needs to look simultaneously at economics and technology, and hence the word, techonomic.
Commenting on the global economy, he said, the industry had just come out of a very severe recession. Last year, Dr. Geus had introduced the recession compiler.
Today, there’s a clear sense of turn, and a huge shift in the global economy during the recession. According to him, China will pass Japan and become the second largest economy. China has continued to evolve quite a bit, and so has India. Dr. Geus also introduced the recovery compiler six months ago.
He added that people on one side are looking at how to minimize costs and risks. How does this impact semicon? Most semicon companies are now reporting good results. Today, there has been about 5.8-6 percent of growth, indicating a steady state. Semicon is in the center to drive growth.
In the foundry world, there has been some consolidation, and you now find some really large ones. So far, semicon has rebounded somewhat much faster. The memory folks are also feeling pretty good. It must be noted that during the last three years, they invested really nothing in capex, and some players also disappeared.
If one were to look at cool killer applications today, there’s certainly a theme around video more and more on mobile apps, HD, 3D, etc. All of this is leading to the fact that bandwidth and storgae will grow even more. Smart grids are also clearly becoming more important In future. The word ‘smart’ will be critical. “Eveything around us will commmunicate in some form or another, in future,” Dr. Geus added. Read more…
Indian Microelectronics Academy (IMA) formed to build, nurture and grow start-ups!
Carson Bradbury, director, Cre8ventures, spins off the Indian Microelectronics Academy!
The idea of the IMA was conceived and developed by Carson Bradbury, the mastermind behind the European Microelectronics Academy (EMA), who has helped this India chapter get off the ground. You can see him raising the salient points of the IMA to a select audience from the Indian microelectronics industry.
As for the areas of focus, he adds that it will be “wherever there is a big unmet business need and the opportunity to own a value chain through microelectronics.” For details, visit http://www.indianmicroelectronicsacademy.com!
What will the IMA do for start-ups in India?
And, what will the IMA do for start-ups in India? In this regard, Carson says: “The IMA will uncover unmet business needs from big companies from Coca Cola to Tata and will solve the innovation gaps by creating/connecting start-ups and leveraging open innovation strategies from multi-national semiconductor companies.
“The IMA will help start-ups get to momentum through the experience, trust and influence of the high profile individuals which represent the IMA’s executive team and the contribution from industrialists (e.g. EDA, Foundry, IP, Assembly and Test, Software and Design Services) who’s ‘take’ is first mover advantage and who’s ‘give’ is risk sharing business models (e.g. spin-out, spin-in, IP donation/extraction).
“The IMA will then aim to take start-ups further down stream so when they get to Series A they will have triple A board rooms, markets defined, early adopter customers an first product/silicon in place.”
Now, I sincerely hope this is the story that the Indian semiconductor and electronics industry has, perhaps, been looking forward to! There is a pressing need to build, nurture and help start-ups to develop and grow. The IMA has the goal to make that happen! In that respect, this is your — the Indian microelectronics industry’s — story!
The IMA’s initial steps would be to actually start getting connected with the Indian startups who require immediate help and attention, and come out with its first success story, and more!
I also hope that the IMA can interest the other leading industry bodies in India to join hands and make this a very robust ecosystem that will serve the Indian industry in the years to come.
Why need an IMA?
So, why need an IMA in the first place? Well, the IMA has been formed in India with the objective of creating an ecosystem of bringing together all of the necessary pillars required to create successful startups and bridge the innovation gaps among the leading companies.
The idea is to also grow the GDP of the region based on a knowledge based economy. This is a proven concept, which worked for seven years in the form of Cre8Ventures in Europe. In 2010, Cre8Ventures first set up the EMA in Europe and now, the IMA in India!
Who’s involved in IMA?
Naturally, Carson Bradbury, the brain behind all of this, is heading the initiative!
The others in this team include Raghu Panicker, sales director, Mentor Graphics India, who plays the role of a non executive director in the Academy and brings the world class EDA tools required for the startups to the table.
Himanshu Rawal, account manager, Mentor Graphics India, will play the role of director, Cre8Ventures India. His charter in the Academy is to discuss and uncover the interests of the various startups, understand the innovation gaps of the leading companies and bring these in front of the Academy. On a personal note, many thanks to Himanshu for also providing valuable inputs for this post.
Yours truly has also been asked to join. I hope I can play a decent role in connecting the right dots together!
Calling all interested start-ups: to start a dialogue, please feel free to contact me — Pradeep Chakraborty — through this blog. You can also contact Himanshu Rawal at himanshu_rawal[at]mentor.com. Read more…
EDA360 unplugged with Cadence's Jaswinder Ahuja
Jaswinder Ahuja, corporate VP & MD, Cadence Design Systems (I) Pvt Ltd.
Following the announcement of the EDA360 last week, I managed to get in touch with Jaswinder Ahuja, corporate vice president and managing director, Cadence Design Systems (I) Pvt Ltd. We discussed a variety of topics such as why the EDA industry is at the crossroads, EDA360 unplugged, the integrators vs. creators concept, the IP stack and the road ahead for EDA360.
First, why is the EDA industry at the crossroads?
“Semiconductor companies are being asked by system companies to provide the hardware platform as well as the software that will run on that particular platform. That is the trend that Cadence is seeing today, and that is what is discussed in the EDA360 manifesto,” he added.
EDA is at crossroads because EDA companies can no longer provide the tools only for IP integration and silicon realization like they have been doing all these years. EDA now has to encompass SOC realization (including bare metal software) and then move towards system realization, which includes mechanical/board design, he noted.
EDA360 and its key features
Ahuja said that EDA360 represents System Realization, the development of a complete hardware/software platform ready for applications development; SoC Realization, the creation of a single SoC including hardware-dependent software; and Silicon Realization, which includes complex digital, analog, and mixed-signal designs.
The traditional approach to system development starts with the hardware, and appends the software and the applications later. With application-driven System Realization, designers start by envisioning the applications that will run on the system, define requirements, and then work their way down to hardware and software IP creation and integration. This flow requires some new and expanded capabilities.
Part of system realization is project management. EDA360 reaches beyond engineering teams to help customers meet project and business objectives.
Key features of EDA360 include:
The four chapters of the EDA360 manifesto take a look at:
EDA360 to help integrators close profitability gap!
Cadence's EDA360!
The EDA360 vision paper says: “Today, systems and semiconductor companies are undergoing a disruptive transformation so profound that even the best-known companies will be impacted. The EDA industry now stands at a crossroads where it also must change in order to continue as a successful, independent business. Without that change, EDA will become a fragmented industry offering suboptimal, poorly targeted solutions that fail to solve customer problems. As a result, the huge leap forward provided by the electronics revolution will come to a standstill. The result? A squandered opportunity for technology innovation, and a diminished contribution by the electronics industry to re-build the global economy.”
You can download the vision paper from eda360.com, if you like!
The vision paper is essentially looking at where EDA should be heading over the next five years. The four chapters of the EDA360 are:
* EDA360 enables silicon realization.
Why is the EDA industry at crossroads?
The EDA industry to date has only served the needs of creators. It has almost completely ignored integrators, who need a different set of tools and capabilities. How can the EDA360 go about achieving this?
When one says that the EDA industry has so far only served the needs of the creators, It is only a reflection of the evolution of the industry. The fundamental manner in which electronic design is being done is now changing. While it is shifting, it also takes a while to understand the entire paradigm. The industry is also moving toward IP re-use, etc., — those are all the shifts.
The industry is now said to be looking at a new paradigm: integration ready IP. What the vision paper does: it takes the industry to where it is heading and tells this is what’s needed. This is what the integrators will need in the future.
Clear mixed signals from Magma @ MUSIC India!
Rajeev Madhavan, chairman and CEO, Magma. speaking at MUSIC 2010.
Clearly, Magma Design Automation is banking heavily on mixed signal designs, as well as analog, as evident from the number of announcements made at the MUSIC India 2010.
Rajeev Madhavan, chairman and CEO, Magma, stated in his keynote: “A few years ago, we observed that most customers were moving toward mixed signal designs. Four years ago, we started investing in a lot of analog areas and mixed signal areas. He added that Magma had introduced five new products this month, and five others were slated for release later this year.
New product announcements
At MUSIC India 2010, Madhavan made several new product announcements. First, the Tekton — next generation static timing analysis (STA) tool. “We already have 32 beta sites under way,” he said. A tradiotional STA tool apparently has about 21 scenarios and it possibly takes over two hours runtime per scenario. With Tekton, the runtime gets reduced to less than 30 minutes for all of the 21 scenarios.
Magma announced the QCP — the standalone extraction tool as well. This scalable tool features an advanced architecture, which claims to deliver 10x performance. Another announcement was made about the SiliconSmart ACE memory characterization tool.
Magma also announced the Titan ADX v2.0, its analog IP optimization software. Madhavan added, “We have provided all of the base library of IP with the tools.” It has been licensed it to the largest fabless company (or fab? both names were taken!), with the release likely to be made in June 2010. v2.0 features auto mapping.
The fifth product announcement was about the FineSIM Fast Monte Carlo, which is being used by TSMC. Fast Monte Carlo uses a unique statistical approach to significantly reduce the number of simulations required to determine yield.
Magma’s product updates
Madhavan also announced some product updates. One, Magma has been managing ‘big chips’ on Hydra, an auto interactive floorplanning and hierarchical design planning solution. Advanced hierarchical aware capabilities automate complex tasks. There is 10 percent reduction in TAT (turnaround time) for macro placement vs. manual approach. Two, it is managing ‘big blocks’ with Talus. This is v1.1, and has a new MCMM accelerator.
Three, Magma’s momentum continues with the Titan. Twelve customers are said to be using this tool. Madhavan also updated on the Quartz DRC and LVS — which are ready to go. AMD, Samsung, Nvidia, etc. are among the users.
Finally, FineSIM SPICE and FineSIM Pro. This is said to have been a big success for Magma. Madhavan also added that there will be some unique technology announcements from Magma in the June time frame. “We have five very new technologies that will be launched at DAC 2010,” he added.
Pradeep Chakraborty 