Altera on FPGAs outlook for 2009

Hardly any segment of the global semiconductor industry has escaped the economic financial crisis! Nevertheless, as the year draws to a close, several segments are planning strategies for tackling what could well be a difficult 2009! FPGAs are no exception!

Jennifer Lo, Senior Marketing Manager, Altera Asia Pacific, agrees. Highlighting the impact, as per reports in the media, the economical environment we are getting into is extremely challenging. Recently, Gartner lowered its 2009 semiconductor forecast to ‘down 16 percent’ as compared to 2008.

Altera placed strongly
Lo says that compared to the other semiconductor companies, many of whom are taking very drastic measures in cutting down costs and preserving capital, Altera is in a very strong position, both financially and product-wise.

Financially, Altera is said to have taken steps to focus on cost reductions and simplification internally, a few years ago. The company is seeing great results from those efforts. “You may check our financial data and find that we are essentially debt-free and have very healthy balance sheet. We continue to be profitable even under the very challenging environment we are in,” Lo contends.

Product-wise, Altera announced a few days ago that it is shipping the industry’s 40nm product, considered a key milestone. “We are very excited about it with this new product family, Stratix IV, which offers the industry’s largest density, highest performance, highest system bandwidth and lowest power, targeting customers in a variety of markets, including communications, broadcast, test, medical and military,” she says.

Going forward in 2009, Altera will continue to rollout the rest of the members in the Stratix IV product family. It will also continue to execute new product strategies in the plan with full confidence.

Tackling demand weakness in FPGAs
There have been whispers regarding demand weakness in the FPGA industry. On the contrary, Lo adds that lower power, lower cost and smaller space are still common needs for portable applications for 2009. These needs may drive PLD vendors to focus on architecture and process to address power and cost. Also, work on package to develop a smaller device. Altera’s goal is to still focus on these common needs.

The Altera MAX II Z already offers the lowest dynamic power and comparable static power in industry already. The company may focus more on package size on 2009.

Although leading-edge FPGAs are scaling to 40nm and beyond, have the tools caught up with these new and complex processes? She says that lowering power consumption and improving customer productivity have been the focus of Altera’s product strategies for the past few years.

Lo adds: “Lowering power consumption means lowering costs for customers, not only in the BOM cost (reducing heatsink or cooling requirement), but also the ongoing operating cost (fans, air-conditioning costs,…etc). At this day and age of ever increasing fuel and electricity costs, this is gaining significance in customers’ selection consideration. Seeing such a need, reducing device power consumption has been a major element in the company’s product planning and execution.”

Altera’s Max II Z product in the low-cost CPLD line offers the lowest dynamic power and static power in the industry that is catered for the portable applications. On the high end of the spectrum, with Stratix IV GX, for example, with the advanced 40nm process node, Altera utilizes the ‘Strained Silicon’ technology, lower core voltage of 0.9V, triple gate oxide, as well as low-K inter-metal dielectric material low power transceiver designs.

“In terms of design, we put in extra effort in lowering the overall power consumption in the transceivers as well as optimized DDR memory interfaces,” she notes.

Coupled with programmable power technology, which allows customers to use high performance (hence, high power consumption) circuitry for design along the critical path, while either using low-power circuit on other parts of the design or turning the logic blocks completely off while not in use, all process and design innovations work together toward one common goal of lowering the overall power consumption in the customer design.

Lo says: “In customer productivity improvement, we’ve invested in the feature sets in our design software, Quartus II, to enable team-based designs, incremental compilation, as well as faster compilation time compared to the other competing software. We also have a wide suite of IPs in a multitude of applications and technologies, such as our Nios embedded processors, the many memory interfaces and peripherals. Combining all of those with our SOPCBuilder tool also enables customers to integrate system designs with very much reduced time and effort.”

There have also been some talks lately about FPGA design starts being quite flat over the last couple of years.

Altera sees a lot of new market applications for FPGAs, apart from the traditional communications market. Out of the many market segments that it participates in, the company feels that communications, military and industrial segments will be in better situation than others in the next couple of years. Needless to say, Altera will continue to focus on these segments.

Tackling complexity
Tackling complexity is a major focus area for projecting FPGAs as a growth segment for 2009.

Lo says: that as with other previous downturns, the industry may go through its reformation, which may inevitably involve some weaker companies to either go out of business due to deteriorating business environment or get acquired by stronger companies. Altera is very confident that programmable logic, with its highly flexibility, versatile application, will have a good market position in 2009.

The Hardcopy ASIC is said to have been Altera’s major differentiator from the other PLD/FPGA vendors.

“We are the only company having both an FPGA vehicle to enable fast time-to-market and simultaneously possessing the seamless migration platform to low-cost production support using Hardcopy ASIC. With the industry trend of fewer and fewer ASIC starts due to the high NRE costs and high justifying volume, there will also be less investment in the ASSP front given the contracting demand. We see Hardcopy as a major competitive edge that will us bring to a different rank in the industry,” she notes.

Indeed, it is good to see companies thinking very hard about tackling a difficult 2009! There’s lot of fight left, and it’s not that semiconductor companies haven’t faced downturns earlier. Keep the faith and allow these folks to come up tops again!

What can the global semicon industry do to get back its money-making touch!

It is very well known that the global semiconductor industry has had a year full of turmoil. The ongoing global financial has been not been of any help either.

The key question: Has the semiconductor industry really lost its money making touch?

According to iSuppli, facing dwindling profits, fewer opportunities to expand by taking market share from competitors and a shrinking roster of star performers, the semiconductor industry has entered a period of lowered expectations and diminishing options, forcing chip suppliers to rethink their basic strategies for success.

Thanks to Jon Cassell at iSuppli, I caught up with Derek Lidow, president and CEO, of iSuppli, to find out more about why the global semiconductor industry has become less forgiving. He has offered a range of suggestions for the global semiconductor industry to adopt and follow. The beauty of the advice lies in its simplicity, and I hope the industry is reading!

Facing dwindling profits and fewer opportunities to expand by taking market share from competitors and a shrinking roster of star performer, how difficult is the market today?

According to Derek Lidow, at the moment, the makers of electronics have started slamming on the brakes as they have decided that the financial turmoil will effect Christmas spending.

In this scenario, what strategies should the players: a) fabs; b) NAND; c) DRAM; d) materials devise, to ensure some turnaround?

Lidow says that the fab players should consolidate fabs to make them more efficient.

Both the NAND players and DRAM players should push out capacity expansion plans. Makers of devices should make variations of the existing products that customer would like to have, and don’t turn down opportunities to lock in orders for specials.

If semiconductors have actually lost their money-making touch, it is really an alarming sign. However, Lidow advises that the semiconductor business is maturing and every industry, as it matures, must undergo transitions.

Leaders can’t ignore looming changes
“Often, these transitions come as a surprise and many companies go through hard times,” he says. “Semiconductor companies don’t have to go through the turmoil of the steel or automotive industries if it doesn’t want to. The leaders of the industry just can’t ignore the looming changes.”

Is there a way that semiconductor companies break out of the current market dynamics to outperform the industry?

Lidow suggests the semiconductor companies should STOP doing things that they are not good at! He adds: “Each company will have to follow a recipe that eliminates where they are mediocre and focuses on where they add real value. Next, they should change their business models so that semiconductor technology is the tool, not the objective.”

According to him, designing more total systems with system-level chips built around proprietary Intellectual Property (IP) should be enough.

He says: “The electronics industry is $1.5 trillion dollars in size, and the semiconductor industry is $270 billion in size. There is a lot more value to capture. However, the value is more complex to unlock and requires as much or more software expertise as it does semiconductor expertise. They have to get married together to succeed in developing proprietary IP.”

Areas to outspend rivals
As for the areas where companies can massively outspending rivals in areas of products and manufacturing, these would be leading edge wafer foundries, memory chips, and the most complex system-on-chips (SoCs).

Why won’t this massive outspend simply to maintain technical and scale dominances in competitive market segments be risky?

Lidow says you can only use this strategy if you know you can outspend your rival! “We see the problems of a spending race in the memory market where many companies are trying to keep up with Samsung’s massive investments and it is hurting everyone,” he points out.

iSuppli has also advised adopting a scalable acquisition process that would allow a semiconductor company to grow by buying other companies or selected parts of companies.

Lidow says: “I think the point of my article was that there haven’t been any success stories to date. So, this strategy is unproven, but very tantalizing, considering the state of the maturing industry.”

Is the timing right for having fabs in India?

Several majors have announced their Fab-lite strategies, and so, IDMs will become likely become fabless units of tomorrow. In this scenario, is the timing for setting up fabs in India right? What is the direction ahead for the Indian semiconductor industry?

Commenting on the upcoming fabs in India, Anil Gupta, MD, India Operations, ARM, said: “Yes, we do need the fabs to complete the ecosystem. The question is: Is the timing right? We have our own strengths. Why not capitalize on those?”

It is important to determine what India is doing as part of the global semiconductor industry. “What are we doing as an industry? Fabs are definitely a good idea. We also need to address things like — can we make products and more importantly, should we make products!”

Gupta pointed out Infineon, NXP, etc., had announced Fab-Lite strategies. Even Texas Instruments was moving to a Fab-Lite strategy. “IDMs are going to be the fabless units of today and tomorrow,” he added.

Coming back to the point of manufacturing products in India, he said: “We need to be able to conceptualize products for the mass market. Are we willing to take the risks? With services, the risks are significantly lesser. Companies are innovating on their service models. On the product side, India should do that as well. Maybe, we will do it too.”

As for the industry growth drivers, consumer applications would become even more atractive. “There are mobile phones, gaming applications and others, which will drive growth,” he said.

Yield management crucial
According to Gupta, yield management is crucial. While designers are well aware of yield management, the adequate tools are not yet there in place. The direct link
has yet to be established for implementing DFM/DFY technique.

Designers are always looking to prove how to improve yield. It is critical for designers to have access to the relevant information that would indicate that, say, some modification in design would lead to 10 percent increase in yield. Gupta said, “As much as we move to 45nm, to 32nm to 22nm and so on, the problems are going to become more complex and magnify.”

SOI addresses power, performance scaling issues
There is the silicon-on-insulator technology or SOI. SOI is said to improve power consumption, reduces leakage and allows better performance. Implementation of SOI technology is one of several manufacturing strategies employed to allow continued miniaturization of microlectronic devices.

ARM acquired SOISIC, a leading company in physical IP based on SOI technology last year. The move has enabled ARM to strengthen its physical IP portfolio by adding SOI technology.

“SOISIC’s niche is in developing SOI based IPs,” Gupta added. SOI addresses the power and performance scaling issues associated with traditional bulk CMOS processes as they migrate to ever-smaller geometries. “It is very clear that design starts for 45nm – 32nm – 22nm etc. will be very low. Each process geometry has to give returns,” Gupta added.

Role of IPs
So what’s the role of IP in the gameplan? ARM is trying to enable that on technology side with SOI and bulk CMOS. He noted: “You need building blocks to make things happen faster. From an IP perspective, analog IP is very, very closely tied to the process. In that respect, IP has a huge role to play.”

The semiconductor IP is said to be a $1.5 billion market. ARM currently has 30 percent share of that market.

From an Indian perspective, there are Indian companies who are building and also re-using IPs, as does ARM. However, ARM also has royalties for its IPs. On usage, Gupta said that physical IPs had greater challenges regarding re-use.

Mali55, Mali200 from India
Commenting on ARM’s India operations, Gupta said ARM India develops physical IPs, processors, etc. “There’s so much of verification and testing involved to make things work,” he added. ARM India currently has a workforce of 300+.

ARM India has done work on 65nm as well as physical IPs for 45nm. “We are also doing studies on 32nm,” added Gupta. ARM India released the Mali55 and Mali200 processors.

The ARM Mali200 graphics processor unit (GPU) delivers 3D graphics for next-generation mobile games on smartphones and other high-end portable devices. With a very small footprint, the ARM Mali55 processor brings rich 3D graphics capabilities to low-cost feature phones for the first time.

Besides these, a lot of software — embedded, drivers, stacks, etc., are being developed in India. ARM India also provides lot of support for various design implementations. “We have over 2,000 ARM certified professionals in Bangalore alone and over 7,000 in India,” he said.

ARM India has two other programs. Companies like HCL, Sasken, Mindtree, Wipro, etc., are ARM approved design centers (ADCs) or partners. “If we have any new product, we ensure that our partners become acquainted with those,” said Gupta. The other program is the ATC (training). Cranes Software is ARM’s approved ATC.