Archive

Archive for the ‘40nm’ Category

Altera Nios II processor gets Wind River Linux support

Wind River recently announced the Wind River Linux support for Altera’s Nios II embedded processor.

Commenting on the Nios II processor adoptiion, Mikeson Wang, Product Marketing Manager, Asia Pacific, Altera Corp., in Hong Kong, highlighted that it has over 20,000 licensees worldwide, and is used by each one of the top 20 OEMs. The Nios II processor happens to be the industry’s #1 soft core CPU, as per Gartner Dataquest. There exists a very vibrant Nios Forum community of over 10,000 users. It is also used by developers in all Altera markets.

Wind River delivers Linux support for the Nios II processor also means that the #1 FPGA processor is now supported by best-in-class embedded Linux. Also, Nios II plus embedded Linux = BOM cost reduction.

It is a compelling alternative to discrete off-the-shelf processors. Wind River customers have access to Altera’s full spectrum of FPGA and HardCopy ASIC solutions as well.

Wang added that the Nios II is popular because of providing design flexibility. Being a custom fit solution, it is also easy to modify hardware at any time.

Why Linux + Nios II
There are several reasons. First, it provides cost reduction through integration. Users can replace the existing CPU with an FPGA running Embedded Linux. Next, it provides protection from processor obsolescence. This in turn, protects the software legacy code, which happens to be a customer’s biggest investment.

This combination also allows design flexibility. Besides providing access to open source software, the time to market gets reduced as well.

Highlighting the reasons for the Altera-Wind River partnership, he added that Wind River is the best-in-class Linux partner, with worldwide sales, support, training and service infrastructure. Wind River is also the no. 1 embedded OS supplier for the communications market.

Altera itself has a strong presence in the communications market. Also, the FPGA processor use is a growing trend in embedded applications; and Nios II is leading FPGA soft processor. There is also a significant overlap of Altera and Wind River’s customer base, such as Huawei, ZTE, Motorola, Alcatel-Lucent, etc., to name a few.

Deliveables include:
Altera
* Cyclone III FPGA Development Kit (3C120)
– DK-DEV-3C120
* Linux Hardware Reference Design (Quartus II Project)
– Current design: 125 MHz in 3C120
– Nios II performance: 150 – 300 DMIPS *

Wind River
* Wind River Linux Distribution
* Wind River Workbench for Nios II
– Workbench IDE with Nios II Support
– GNU Tool Chain, Board Support Package
* Flash files (HW & SW for 3C120 board)

The Cyclone III FPGA development kit is a complete platform for prototyping embedded systems.

In summary, the Wind River-Altera partnership helps reduce system cost and TTM, and increases system flexibility. Altera and Wind River already share several customers, and hence, this is a win-win partnership. The strategic partnership with Wind River complements Altera’s silicon, soft processor and FPGA development, besides, Wind River’s industry-leading embedded Linux distribution.

How will this partnership boost FPGA sales? According to Wang: “The current weak demand is due to recession. We see weak demand in every segment. However, we are still outperforming the market.”

Although leading-edge FPGAs are scaling to 40nm and beyond, have the tools caught up with these new and complex processes? Wang added that the process does not have any significant impact.

FPGA vs. ASIC and FPGA trends

This semicon blog is a continuation of the recent discussion I had with Vincent Ratford, Senior Vice President, Solutions Development Group, Xilinx.

FPGAs vs. ASICs
Traditionally, there has always been a classic debate: FPGAs vs. ASICs! To find out more on the current status of this ever going discussion, I asked Ratford for his thoughts on this topic.

He said: “To answer this you have to take a long term view and look forward five years to what a 22nm device might look like and the cost to develop it. ASIC starts have declined over the last five years and continue to decline with ASSPs taking their place. For ASSPs to continue, they have to amortize the development cost across multiple customers, but with $50M development costs climbing to $100M, the number of applications that can support this is shrinking.

“FPGAs now look like SoCs with embedded processors, signal processing, multi-gigabit transceivers and a broad portfolio of IPs available from Xilinx or third parties. With shorter design cycles and increasing need to differentiate or die, we believe the world is increasingly turning to programmable devices.

“The investments we [Xilinx] are making in IP and software to enable more complex systems to be designed will carry our silicon platform forward and enable growth. Our challenges, going forward, are reducing power, providing more capability at a lower cost and simplifying the programming. As we make progress on all these fronts, we will take share from the ASIC/ASSP providers.”

Global FPGA industry trends
Given the current semiconductor scenario, there is a need to estimate the global FPGA industry. According to iSuppli, the programmable logic market was $3.6 billion in CY2007. Xilinx revenues were $1.841 billion.

Given the wobble in the current global semicon scenario, where is the FPGA industry headed? Ratford said that Xilinx is forecasting 5-9 percent growth in FY09, which started in April 2008.

He added: “Our most recent quarter ending June was a record quarter for the company at $488 million, with 4 percent sequential growth. Our customers’ design cycles are 12-18 months, so that tends to delay any weakness. However, design activity has been and still is strong. Our customers are highly diversified with over 20,000 across all the vertical markets. We see strong growth in ISM, automotive, aerospace and defense, and slow growth in telecommunications, which is our largest market at ~46 percent of sales.”

According to him, wireless telecom, which constitutes about 40 percent of Xilinx’s telecom revenue, is starting to go through a round of infrastructure buildouts with LTE and TD-SCDMA. This occurs about every five years.

“As these start to deploy, we expect to see some growth beyond what we are currently seeing. Finally, customers do a lot of prototyping with our platforms. We see no significant slowdown at this time,” he noted.

Taking on Altera
Altera recently released the Stratix IV FPGA and HardCopy ASICs. It would be interesting to find out whether Xilinx has released anything that is close to or better than the Altera Stratix IV FPGA or the HardCopy ASIC.

Xilinx’s Ratford said: “Our Virtex-5 products on 65nm have been shipping for 18 months, growing quickly and gaining market share vs. Stratix-3, which is also on 65nm. Since Altera has had difficulty executing on 65nm as far as Stratix III is concerned, they’ve had to jump to 45/40nm and recently pre-announced Stratix IV. Altera is saying they will ship first samples by December, however it takes quite some time to ramp to volume on a node and to put in place all the software and IP required.

“Our 45/40nm design has been underway for some time and we’ll be in the market with a complete solution at the same time as Altera. What matters is when you ramp to production and when you have critical mass of IP so customers can start designs. We have a much larger IP portolio. Customer design activity on high-end FPGA will remain on 65nm devices for sometime to come. We estimate that Xilinx has about a 97 percent market-share in the high-end with our Virtex-5 family.

Alternative to HardCopy
Apparently, Xilinx also has an alternative to Altera’s HardCopy. Ratford pointed to Xilinx’s EasyPath, which provides similar cost reduction path for customers.

“Our approach doesn’t require design compromises like that of HardCopy. Altera’s most recent quarter showed HardCopy revenue down 2 percent to about $10M/quarter. It’s insignificant!”

The last part of this discussion continues later this week! Watch this space, dear readers.