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India an ideal candidate to propose standards: Dennis Brophy, IEEE-SA
Dennis B. Brophy, Director, Strategic Business Development, Mentor Graphics and IEEE-SA Corporate Advisory Chair.
I was fortunate enough to attend the Global Standards at IEEE seminar today in Bangalore, thanks largely to Veeresh Shetty at Mentor Graphics. It was also a pleasure to meet up again with Dennis B. Brophy, Director, Strategic Business Development, Mentor Graphics and IEEE-SA Corporate Advisory Chair.
Brophy kicked off proceedings with a presentation on the IEEE-SA Corporate Program and the IEEE Entity Standards Development (see image).
The IEEE-SA corporate program helps the industry to accomplish business objectives. It also provides a venue to nurture emerging and existing technologies. It fosters company based standardization as well. The IEEE also allows for networking within the IEEE-SA corporate constituency.
Brophy highlighted some examples of entity based projects such as batteries, design automation and cognitive radio. According to him, good standards are a blend of technology alternatives, economic needs and global requirements. The IEEE standards are developed throughout the world.
He cited an example of the IEEE P1888 draft standard for ubiquitous green community control networking protocol. This protocol had been proposed by Chinese companies. The corporate project is being developed entirely in Asia.
Brophy added that India is an ideal candidate to propose such types of standards for development.
IEEE on IPR
He advised that the IEEE-SA’s patent policy is consistent with those of the ‘Big Is’ — ISO, IEC and ITU, as well as ANSI and other standards development organizations (SDOs).
On the question of who determines essentiality, he said that a court, and not the IEEE, decides on whether a patent is infringed. As per the IEEE-SA model, it is the participants’ obligations to disclose identity of holders of potentially essential patents claims. The IEEE-SA then seeks the LoA (letter of assurance) from the the identified holders. The LoA is irrevocable once submitted and accepted.
Patent policies of many SDOs are said to be Reasonable and Nondiscriminatory terms (RAND) based, and rely on assurance, not disclosure. According to Dr. Epstein, the IEEE’s patent policy is modern and leading edge.
Global semi to grow 4.9 percent: Cowan
This is a new addition to the continuing coverage on the global semiconductor industry forecasts in form of a monthly update to the Cowan LRA Model’s global semiconductor sales forecast numbers.
According to Mike Cowan, an independent semiconductor analyst and developer of the Cowan LRA model, the “momentum indicator” dropped to 1.8 percent from March’s number of 6.1 percent; but still remains in positive territory.
Consequently, the updated forecast numbers increased very slightly from March’s results with the 2008’s sales forecast estimate increasing to $268.249 billion (from last month’s estimate of $267.318; up a modest 0.35 percent) thereby yielding a year-on-year (YoY) sales growth forecast estimate of 4.9 percent (up from last month’s sales growth forecast expectation of 4.6 percent).
This newly updated sales growth forecast estimate of 4.9 percent as per the Cowan LRA model compares quite favorably with both Gartner’s most recent forecast update of 4.6 percent and the WSTS’s Spring 2008 forecast update of 4.7 percent.
Cowan adds: “It should be highlighted that these Cowan LRA Model’s forecast numbers are a “snapshot in time” (for a given month) and will “change” as each new month’s results are made available and digested by the dynamic Cowan LRA Model as the year evolves.”
Cowan LRA model
A new semiconductor sales forecasting model has been developed to facilitate the determination of future global sales of the semiconductor industry. The Cowan LRA (Linear Regression Analysis) Model, which forecasts global semiconductor sales, is a mathematically based model that features statistical analysis of the past 24 years of historical, monthly global semiconductor sales numbers that are collected and published by the World Semiconductor Trade Statistics (WSTS) organization.
Mike Cowan is a 45-year semiconductor industry veteran. He has a 36-year history at IBM’s Microelectronics Division in East Fishkill, N.Y., where he was involved in many facets of semiconductor development and manufacturing engineering, including both technical and management responsibilities.
Over his last 10 years at IBM, as a senior technical staff member, he has been involved in strategy development and competitive analysis focused on the semiconductor industry, and has developed a number of top-down and bottom-up models to predict the dynamics of the semiconductor industry.
After retiring from IBM in 2002 he became an independent semiconductor industry analyst providing his monthly forecasts to The Semiconductor Reporter Web site from 2002-2006, and presently to Future Horizons.
May I also take this opportunity to welcome Mike Cowan on my blog.
Movers and shakers in semicon; new fabs in Asia
While speaking with the Fabless Semiconductor Association, USA, some time back, I quizzed them on the major movers and shakers (or slips) among the top 25, and what are the reasons for those.
Qualcomm has broken into the top 10 for the first time. It’s the first time in the history of semiconductors that such a thing has happened, and is probably a sign of the times ahead.
One reason for this growth has been — Increasing foundry orders. A Digitimes article reported that Qualcomm will increase orders by 15-20 percent in the September quarter to meet projections of strong 3G handset sales. According to the article, sources at Qualcomm suggest that wafer starts per month in the December quarter could surpass 30,000.
There have also been reports of strong June quarter for 2007. Qualcomm’s $2.32 billion in June quarter sales represents 19 percent year-on-year growth. Record chipset volumes of 65 million were at the high end of 62 million-65 million guidance. UMTS chipset shipments were noted to have increased by 127 percent year-over-year and 79 percent quarter-over-quarter, with the quarter-over-quarter growth rate roughly 4 times the market growth rate.
Finally, chipset ASPs increased by 2 percent year-over-year and quarter-over-quarter, and are likely to remain stable.
Situation in Asia
FSA quoted the Strategic Marketing Association’s Quarterly Spot Report – July. While there have been announcements in India by SemIndia, HSMC, Moser Baer, etc., for fabs, there is every likelihood of another fab in the eastern Indian state of West Bengal. The technology ministry announced plans for a yet to be named fab at the India Design Center. Another possibility is a fab in Kochi, South India, by the NeST Group.
In China, Strategic Marketing Association expects that eight new fabs will start construction this year. Two fabs have started construction in the first quarter (Hua Hong NEC and ProMOS), and two more have started construction in the second quarter.
Grace Semiconductor, now headed by former Infineon boss, Dr. Ulrich Schumacher, which opened its first fab in 2003, began moving equipment into the shell of Fab 2, which was built at the same time as Fab 1. The company is installing used equipment and plans to begin production in Q1 0f 2008. The company also plans to begin building a 300mm fab, perhaps as early as next year, although financing is said to remain an issue for such a project.
Also in China, IC Spectrum began building a 200mm fab in Kunshan, about 45km east of Shanghai. Using 0.35micron technology from Toshiba, the new foundry expects to begin volume production by the first quarter of 2009.
TSMC began production in the second phase of its 300mm Fab 14 in Tainan in the south of Taiwan. This $2.4 billion fab will start production at 65nm and move to 45nm in 2008. There are also plans for a 300mm Fab 14, Phase 3 at the same location.
Looking at capex
In 2007, companies with capital spending budgets of $1 billion or more (the Billion Dollar Club) will account for 77 percent of all capital spending. Most of these companies (13 out of 20) are memory companies. Nine of these companies are from Asia Pacific (South Korea, China, Taiwan and Southeast Asia). Together, they plan to spend $23 billion this year, more than half of what the Billion Dollar Club has budgeted for capital spending.
Next-gen PCB design with Allegro
Cadence was kind enough to discuss its Allegro solution with me recently. The solution aims at enhancing the productivity for next-generation PCB designs.
According to Steve Kamin, Group Director, Cadence’s Allegro systems division, customers face constraints such as higher frequency, power consumption, pin counts, packages, etc. The PCB designers also face challenges such as decreasing hole sizes, hole diameter, etc.
Features of the Allegro include GUI (graphical user interface) modernization, context sensitive editing paradigm, color and visibility improvements, integration of physical and spacing constraints into the Constraint Manager, and an interactive planning and global routing, respectively.
In a PCB design flow, Cadence has focused on usability and productivity. The Allegro has a modernized GUI. All of the tool bars have been completely refreshed. Cadence has also added foldaway windows.
Cadence has added context-sensitive editing and included an open GL graphics engine that improves the visibility of objects and components on a board. This release can handle all sorts of intricate designs.
It has also addressed the physical and spacing constraints, which has been included that into the Constraint Manager. This is a cockpit, a spreadsheet-based tool, which manages all of the properties. Cadence is selling this solution to OEMs, ODMs, PCB design services companies, etc.
The Allegro solution has an interactive planning and global routing facility. Cadence has also added an entry-level product in the OrCAD PCB Designer Basics. Its GRE is a new, next-generation technology, which has two new elements — the interactive flow planner and the Global Route Environment.
The GRE cuts to 1-2 iteration of routing. Customers can control the direction of the routes. Fabricators sometimes have had to kill the design as they could not control the routing or it was not possible. Hence, Allegro takes care of this issue. It saves significant time, from 15 months to about three months.
Allegro facilitates an improved design creation and simulation as well. The Allegro System Architect has differential pairs support and improved schematic generation. Other features include physical and spacing constraints in Allegro Design Entry HDL, performance and convergence improvements in Cadence Pspice and Allegro AMS Simulator, etc. Cadence has improved the automatic schematic generator. Also, in the analog simulation product line, it has added the automated convergence capability.
Finally, the company has added Cadence Help across all of its products. This allows cross-linking across all Cadence’s tools. Customers can also add their own content. Cadence integrates third-party thermal integration tools into the products.
Chipping away at wireless USB
I happened to meet up with MosChip Semiconductor Technology, a well known fabless semiconductor company, which is listed on the BSE (No. 532407). What attracted me was the fact that MosChip is said to be focusing on wireless USB. as well.
It has been concentrating more on the digital side and is talking with a company for providing the radio (analog) chip, for a licensing agreement. As and when the market for wireless USB picks up, MosChip would be ready and waiting! Now, this is great! An Indian company, chipping away at the wireless USB market, waiting for its time to pounce and capture it!
Its engineering team is capable of designing end products that work across different operating systems and multiple platforms of various hardware configurations. MosChip has engineering expertise in PCI, USB, IEEE 1394, serial–parallel, SoC, device drivers, embedded firmware, engineering and reference platforms, PLL, transceivers, and A/D and D/A.
It is also developing custom products and IP for customers. Although Moschip is currently working on USB, PCI and IPSec, it is now going toward the SoC, according to its CEO, Ram Reddy.
The company adds application packages as software platforms are required for people to plug in the board. MosChip has 45+ software engineers who work on both embedded and platform to support such activities.
MosChip can give the complete object code to companies and source code to bigger companies with an agreement in place. It focuses mostly on OEM and ODM companies in the Far East. MosChip has strong distribution ties in place in China, Hong Kong, Japan and Taiwan.
Moschip, being a fabless company, contracts work to UMC, TSMC, etc. As and when, proposed fabs comes up in Hyderabad, Moschip would partner with any one of them. MosChip also announced the MCS8140, a highly integrated network processor. This network processor can be used with USB, multiple servers, etc., rather, with everything that is on IP. A maximum of 16 devices can be supported on the USB ports via IP. It is a single-chip solution.
Indian semicon industry: Give it time, you will see the results
Continuing from my previous blog, I’d like to mention here that Gartner, as well as some others, do point out that the Indian semiconductor industry is still in a nascent stage. We are all well aware of that!
A semicon policy has recently been announced to attract investments in semiconductor manufacturing. About five players announced plans and some have submitted proposals to the government. It will be at least another two years before things start rolling.
S. Janakiraman, president, ISA, and president & CEO – R&D Services, Mindtree, elaborated that the Indian government had, for the first time, come out with an exclusive policy for the semiconductor industry. This policy should provide significant boost to the manufacturing sector.
The ISA had closely worked with the Indian government to structure the policy to meet the expectations of the industry, while protecting the countries interest in terms of the right size of investments as well as right technologies being deployed.
The impact of the policy on the manufacturing sector will take time, but when it does becomes reality, it will create significant positive impact for the semiconductor sector.
There is also a clear interest by all leading IDMs as well as fabless semiconductor companies in looking at India as a destination for complex design sourcing, as well as increase their market share in a growing market.
Manufacturing of electronics has seen remarkable progress in the last 18 months with majors such as Nokia, Motorola, Flextronics and Foxcon now investing in India. Similar thrust in investments in semiconductor fabrication, test and packaging is not far away.
Technologies are fast evolving and mixed signal is becoming reality. Geometries of semiconductor technology is also shrinking, from 90nm to 55nm and even 35nm. Not only that, India is now in a position to talk about a multilayered chip or a 3D chip.
Pradip Dutta, president, Synopsys, believes all local and global majors based in India are poised for growth. Global majors will likely continue to leverage on the talent available. There will likely be even more emphasis on high-end design as well as determining the go-to-market strategy.
Whether it is the frequency, number of gates, high complexity, etc., all of those would be driven by applications. India is now ready for doing high-end
complex designs. All of this really augurs well for the Indian industry.
Kamal Aggarwal, VP – Marketing and Strategy, SoftJin Technologies, told me that the semiconductor market, globally, is likely to grow close to 10 percent during 2007. In India, it is likely to grow much faster due to the high growth in electronics consumption, maybe, around 30 percent.
Some observers feel that fabless is the best way to go for India, in order to tap our engineering talent in chip design and let the foundries in Mainland China and Taiwan give India the best wafer prices and help us keep up with ever reducing geometries.
These countries have the infrastructure for this R&D and we (India) have the engineering talent. Yes, I agree that this is a separate issue. There may not be several fabs as many think it would be. It’d probably be a mixture of maybe four or five fabs (my estimate) and lots of fabless companies, along with the ancillaries.
India should also encourage fabless semiconductor chip companies (product companies), give them concessions and tap into the US $300 billion semiconductor component market as well. All of this will happen, just give it some time folks!
Indian semicon industry: Good start's there for all to see, ain't it?
Our telecom and IT minister, Hon’ble Dayanidhi Maran resigned late last week. It prompted a friend to ask me whether this move would derail India’s semicon policy and the path the industry had taken.
Of course not! We’ve made a good start, and there’s still some way to go. The former minister has put us on a good path and the Indian semiconductor industry has been taking the right steps to figure among the top nations soon.
Take a look at some statistics. According to the India Semiconductor Association (ISA), India’s total semiconductor consumption in 2005 was about US $2.8 billion, met chiefly through imports. This demand is likely to exceed US $36 billion by 2015.
Electronics — whether it is office automation, consumer electronics, medical electronics, telecom or industrial automation, will require more of the semiconductor industry in India.
The major end user segments have been communications, IT and consumer electronics. Together, the important product sub-categories that would drive the semiconductor market in India are mobile handsets, wireless equipment, especially BTS equipment, which is gaining momentum, set-top boxes, and smart card terminals.
With its growing middle class population of nearly 400 million people which will only increase over time, India’s electronic equipment consumption which was estimated at around US $28.2 billion in 2005, is likely to reach US $363 billion by 2015 growing at around CAGR 30 percent. The Indian electronics equipment domestic production was US $10.99 billion in 2005 and projects an opportunity to touch US $155 billion in 2015.
Statistically speaking, the Indian semiconductor design industry, comprising of VLSI design, board design and embedded software companies, has design companies across Bangalore, NCR Delhi, Hyderabad, Chennai, Pune, Ahmedabad and Goa. All of the global top ten fabless design companies also have India operations and 19 of the top 25 semiconductor companies are already present here as of early May 2005.
The Indian semiconductor design industry (i.e. VLSI, hardware/board, embedded software) had a turnover of US $3.2 billion in 2005 with an engineering workforce of around 75,000. It is estimated to reach US $43 billion by 2015 and provide jobs to 780,000 professionals with a CAGR of around 30 percent for this period.
The ISA-EY Benchmarking Study 2007 benchmarks the semiconductor design sector in India with peer countries on factors of importance to the sector and identifies important high level focus areas and actions to facilitate sustainable growth. Peer countries are Canada, China, Czech Republic, India, Israel, Taiwan, UK and the USA.
Some of the main findings that clearly position as India as an attractive design hub are:
* Availability and scalability of talent
* Quality of talent
* Quality of technical education
* Talent cost advantage
The increased flow of international companies setting up their offshore design and development base and the ramping up of engineering human resource in the existing set up, including the non-captive companies is expected to drive the revenues for the total design market in India.
Second part follows in the next blog.
India's semicon policy takes off
Close on the heels of the historic Indian semicon policy announced earlier this year comes the news that Hindustan Semiconductor Manufacturing Corporation (HSMC) would be setting up a semicon foundry in India partnering with Infineon Technologies for CMOS licences. It’s no surprise to see Infineon among the early movers as Infineon has been present in India for quite a while now.
This is excellent news as far as the Indian semiconductor industry is concerned. I remember the day the India Semiconductor Association (ISA) was formed in Bangalore in early November 2004. The ISA is a very young industry body and all kudos to it for having taken forward the Indian industry so very well.
Congratulations are also due to Honourable minister, Dayanidhi Maran for having the foresight and for believing in the semiconductor industry.
Not only would the semicon industry boost India’s GDP in the coming years, the policy should also see India emerging as a destination of choice for manufacturing of high-tech products in the future.
This January, while attending the VLSI conference in Bangalore, I had the pleasure of learning about the various incentives some of the state governments, such as those of Karnataka, Kerala, Tamil Nadu and West Bengal have to offer to investors.
Other state governments should come forward as well and make India’s dream of becoming a semicon giant a success and help the semicon policy really take off.
Following HSMC’s announcement, we have now come to expect more such announcements in the near future. All of this really augurs well for India. It will also change the global perception that India is the destination for software and outsourcing.
We can do it. Time to show the world. Well done ISA. Well done Minister. And well done HSMC and Infineon
Are EDA tools a commodity?
I had the pleasure of attending the 20th International Conference on VLSI Design and 6th International Conference on Embedded Systems in Bangalore, and had the good fortune of meeting a range of top experts from these fields.
One panel discussion: “Are EDA technology/products becoming a commodity?”, particularly caught my attention. Speakers debated on whether commoditization of EDA tools was happening with little/no differentiation toward project success.
Dr. Anand Anandkumar, managing director, Magma India, also a good friend, elucidated that the semiconductor design industry cannot do a complex SoC without EDA. And if there’s no EDA, there’s no integration. “If you are a commodity, you cannot solve problems!”
Now EDA is a key driver for semiconductor design companies to achieve objectives of building more and more complex (SoCs). However, the overall market size of EDA industry [estimated at US $4 billion] remains a fraction of the overall semiconductor market size [estimated at US $240 billion].
Dr Anandkumar added there had been various paradigm shifts and problems. The EDA industry was in a way the IP partner with the semiconductor industry. However, he agreed that parts of the tools had been commoditized. The EDA industry had become a prisoner of its own business model.
Nevertheless, newer things have been racing forward. There are also a variety of conflicting problems. Understanding those problems could be a way of handling and solving complex designs. The part of taking over risks had been completely absent. There was little ownership in sharing risks, which needed to change.
From the perspective of consumer electronics eco-system, available EDA technology is often viewed as not being in sync with the expectations and requirements of various design teams. Claims of productivity and quality of results advantages from EDA teams can seem more like wishful thinking than reality to end users.
More so, related issues of quality, inter-operability of standard formats, usability and understanding of designer needs are other areas of ongoing concern. These are not necessarily new issues, so what were EDA companies and their customers doing to address them? Has the EDA industry been getting its proportional value out of the semiconductor industry? Would love to hear from you.
Pradeep Chakraborty 